Store Operations (Floating-Point SSE2 Intrinsics)
Microsoft Specific
For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.
SSE2 intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE2 intrinsics that use the __m64 data type are not supported on x64 processors.
The emmintrin.h header file contains the declarations for the SSE2 instructions intrinsics.
void _mm_store_sd (double *p, __m128d a);
MOVSD
Stores the lower double-precision, floating-point value of a
. The address p
does not need to be 16-byte aligned.
*p := a0
<A NAME="vcref_mm_store1_pd"></A>void _mm_store1_pd (double *p, __m128d a);
(MOVAPD + shuffling)
Stores the lower double-precision, floating-point value of a
twice. The address p
must be 16-byte aligned.
p[0] := a0
p[1] := a0
void _mm_store_pd (double *p, __m128d a);
MOVAPD
Stores two double-precision, floating-point values. The address p
must be 16-byte aligned.
p[0] := a0
p[1] := a1
void _mm_storeu_pd (double *p, __m128d a);
MOVUPD
Stores two double-precision, floating-point values. The address p
does not need to be 16-byte aligned.
p[0] := a0
p[1] := a1
void _mm_storer_pd (double *p, __m128d a);
(MOVAPD + shuffling)
Stores two double-precision, floating-point values in reverse order. The address p
must be 16-byte aligned.
p[0] := a1
p[1] := a0
void _mm_storeh_pd (double *p, __m128d a);
MOVHPD
Stores the upper double-precision, floating-point value of a
.
*p := a1
void _mm_storel_pd (double *p, __m128d a);
MOVLPD
Stores the lower double-precision, floating-point value of a
.
*p := a0
END Microsoft Specific
See Also
Reference
Floating-Point Memory and Initialization Operations Using Streaming SIMD Extensions 2