Integer Intrinsics Using Streaming SIMD Extensions 

Microsoft Specific

The intrinsics listed in the table are followed by a description of each intrinsic with the most recent mnemonic naming convention.

SSE intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE intrinsics that use the __m64 data type are not supported on x64 processors.

The header file xmmintrin.h contains the declarations for the SSE intrinsics.

Integer Intrinsics

Intrinsic name	Operation	Corresponding instruction
_mm_extract_pi16	Extracts one of four words	PEXTRW
_mm_insert_pi16	Inserts a word	PINSRW
_mm_max_pi16	Computes the maximum	PMAXSW
_mm_max_pu8	Computes the maximum, unsigned	PMAXUB
_mm_min_pi16	Computes the minimum	PMINSW
_mm_min_pu8	Computes the minimum, unsigned	PMINUB
_mm_movemask_pi8	Creates an 8-bit mask	PMOVMSKB
_mm_mulhi_pu16	Multiplies, returning high bits	PMULHUW
_mm_maskmove_si64	Returns a combination of four words	PSHUFW
_mm_avg_pu8	Computes conditional store	MASKMOVQ
_mm_avg_pu16	Computes rounded average	PAVGB
_mm_sad_pu8	Computes rounded average	PAVGW
_mm_shuffle_pi16 (Streaming SIMD Extensions)	Computes sum of absolute differences	PSADBW

For this section you need to empty the multimedia state for the MMX register. See the Understanding the EMMS Instruction section.

For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.

END Microsoft Specific

See Also

Reference

Streaming SIMD Extensions (SSE)