ARM Kernels (Windows Embedded CE 6.0)
1/5/2010
Before control is transferred to the kernel, the boot loader places the CPU into an initialized state. You may also have to perform BSP/CPU specific initializations as mentioned in the BSP user manual.
**The following table shows the ARM-based BSPs and source file locations included in Platform Builder for Windows Embedded CE 6.0 for which the StartUp routine is called to initialize the CPU.
| BSP | Source file |
|---|---|
Intel PXA27x Processor Development Kit (MainstoneIII) |
%_WINCEROOT%\Platform\MainstoneIII\Src\OAL |
Texas Instruments SDP2420 Development Board |
%_WINCEROOT%\Platform\H4sample\Src\OAL |
TI OMAP5912 Aruba Board |
%_WINCEROOT%\Platform\Arubaboard\Src\OAL |
Device Emulator |
%_WINCEROOT%\Platform\Deviceemulator\Src\OAL |
OEMs developing for the ARM processor using the ARM kernel are expected to perform the following tasks:
- Put the processor in supervisor mode.
- Disable the interrupt request (IRQ) and fast interrupt request (FIQ) inputs at the CPU.
- Disable the memory management unit (MMU) and both the instruction and data caches.
- Flush or invalidate the instruction and data caches and the translation look-aside buffer (TLB) and empty the write buffers.
- Determine the reason you are in the startup code, such as cold reset, watchdog reset, GPIO reset, and sleep reset.
- Configure the GPIO lines per the requirements of the board. GPIO lines must be enabled for on-board functionality like LED.
- Configure the memory controller, set refresh frequency, and enable clocks. Program data width and memory timing values and power up the banks.
- Configure the interrupt controller. Mask and clear any pending interrupts.
- Initialize the real-time clock count register to 0 and enable the real-time clock.
- Set up the power management/monitoring registers. Set conditions during sleep modes.
- Turn on all board-level clocks and on chip peripheral clocks.
- Get the physical base address of the OEMAddressTable and store in r0.
- Jump to KernelStart.
To enable floating-point support, see ARM Vector Floating-Point Unit Support.
OEMs developing for the XScale processor can do the following to improve performance:
XScale performance can be improved by changing the Branch Target Buffer Enable bit. To enable this, have the OAL change the bit in OEMInit. The branch target buffer enable bit is bit 11 of the ARM control register.
The BSP for the Texas Instruments SDP2420 Development Board now includes support for ARMV6 and V7 features. For more information, see ARMV6 and V7 Supported Features.