Itanium Intrinsics 

The Visual C++ compiler includes the following intrinsics that are available on the Intel Itanium Processor Family (IPF) architecture:

_AcquireSpinLock	__assume	_BitScanForward
_BitScanForward64	_BitScanReverse	_BitScanReverse64
_bittest	_bittest64	_bittestandcomplement
_bittestandcomplement64	_bittestandreset
_bittestandreset64	_bittestandset	_bittestandset64
__break	__debugbreak	_disable
__dsrlz	_enable	__fc
__fci	__fclrf	__fsetc
__fwb	__getCFS	__getPSP
__getReg	_InterlockedAdd	_InterlockedAdd_acq
_InterlockedAdd_rel	_InterlockedAdd64	_InterlockedAdd64_acq
_InterlockedAdd64_rel	_InterlockedAnd	_InterlockedAnd64
_InterlockedCompareExchange	_InterlockedCompareExchange_acq	_InterlockedCompareExchange_rel
_InterlockedCompareExchange16	_InterlockedCompareExchange16_acq	_InterlockedCompareExchange16_rel
_InterlockedCompareExchange64	_InterlockedCompareExchange64_acq	_InterlockedCompareExchange64_rel
_InterlockedCompareExchangePointer	_InterlockedCompareExchangePointer_acq	_InterlockedCompareExchangePointer_rel
_InterlockedCompare64Exchange128	_InterlockedCompare64Exchange128_acq	_InterlockedCompare64Exchange128_rel
_InterlockedDecrement	_InterlockedDecrement_acq	_InterlockedDecrement_rel
_InterlockedDecrement16	_InterlockedDecrement16_acq	_InterlockedDecrement16_rel
_InterlockedDecrement64	_InterlockedDecrement64_acq	_InterlockedDecrement64_rel
_InterlockedExchange	_InterlockedExchange_acq	_InterlockedExchange64
_InterlockedExchange64_acq	_InterlockedExchangeAdd	_InterlockedExchangeAdd_acq
_InterlockedExchangeAdd_rel	_InterlockedExchangeAdd64	_InterlockedExchangeAdd64_acq
_InterlockedExchangeAdd64_rel	_InterlockedExchangePointer	_InterlockedExchangePointer_acq
_InterlockedIncrement	_InterlockedIncrement_acq	_InterlockedIncrement_rel
_InterlockedIncrement16	_InterlockedIncrement16_acq	_InterlockedIncrement16_rel
_InterlockedIncrement64	_InterlockedIncrement64_acq	_InterlockedIncrement64_rel
_InterlockedOr	_InterlockedOr64	_InterlockedXor
_InterlockedXor64	__invalat	__isNat
__isrlz	__lfetch	__lfetch_excl
__lfetchfault	__lfetchfault_excl	__load128
__load128_acq	__m64_czx1l
__m64_czx1r	__m64_czx2l	__m64_czx2r
__m64_dep_mi	__m64_dep_mr	__m64_dep_zi
__m64_dep_zr	__m64_extr	__m64_extru
__m64_mix1l	__m64_mix1r	__m64_mix2l
__m64_mix2r	__m64_mix4l	__m64_mix4r
__m64_muladd64hi	__m64_muladd64hi_u	__m64_muladd64lo
__m64_mux1	__m64_mux2	__m64_padd1uus
__m64_padd2uus	__m64_pavg1_nraz	__m64_pavg2_nraz
__m64_pavgsub1	__m64_pavgsub2	__m64_pmpy2l
__m64_pmpy2r	__m64_pmpyshr2	__m64_pmpyshr2u
__m64_popcnt	__m64_pshladd2	__m64_pshradd2
__m64_psub1uus	__m64_psub2uus	__m64_shladd
__m64_shrp	__mf	__mfa
__mul128	__ptcg	__ptcga
__ptcl	__ptrd	__ptri
_rdteb	_ReadBarrier	_ReadWriteBarrier
_ReleaseSpinLock	_ReturnAddress	__rsm
__rum	__setReg	__shiftleft128
__shiftright128	__ssm	__store128
__store128_rel	__sum
__synci	__thash	__ttag
__umul128	__UMULH	_WriteBarrier
__yield

In addition, all CRT functions in Intrinsics Available on All Architectures are enabled as intrinsics on the 64-bit Intel architecture, as well as the following additional CRT function:

_setjmpex

Also, many MMX, Streaming SIMD Extensions (SSE), and Streaming SIMD Extensions 2 (SSE2) intrinsics are also available on the Intel 64-bit architecture.

See Also

Reference

Intrinsics Available on All Architectures
x86 Intrinsics
Intrinsics Available on Intel 64-bit Architectures
MMX, SSE, and SSE2 Intrinsics
Compiler Intrinsics