Key Functionality for ARM Microprocessors (Windows CE 5.0)
The ARM microprocessor range provides solutions for the following applications:
- Open hardware platforms running complex OSs for wireless, consumer, and imaging applications.
- Embedded, real-time systems for mass storage, automotive, industrial, and networking applications.
- Secure applications, including smart cards and Single Inline Memory (SIM) modules.
The ARM Instruction Set Architecture (ISA) includes several technology extensions, such as THUMB technology, that enable optimum functionality and performance.
The following table describes characteristics of each supported ARM ISA microprocessor family.
| Microprocessor family | Description |
|---|---|
| v4 | ARM v4 noninterworking architecture. |
| v4T | The ARM v4T architecture introduced the Thumb instruction set, which enables software to be coded using short 16-bit instructions.
Because you can move between Thumb and the normal ARM state with little overhead, you can use Thumb on a routine-by-routine basis to gain complete control over performance and code-size optimization. |
| Thumb | The Thumb instruction set offers a subset of the most commonly used 32-bit ARM instructions compressed into 16-bit operations codes.
You can use both 16 bit Thumb and 32 bit ARM instructions sets, and selectively emphasize speed or code size performance on a functional level. |
| v5TE | The ARM v5TE architecture introduced the ARM DSP instruction set extensions, which provide a significant increase in speed for audio DSP applications. |
| Intel XScale | The Intel XScale architecture targets Internet devices. XScale architecture is compliant with the ARM Version 5TE ISA instruction set, excluding the floating-point instruction set. |
| Intel WMMX | The Intel MMX technology is an extension of the Intel architecture set. The technology uses a single-instruction, multiple-data (SIMD) technique to speed up multimedia and communications software by processing data elements in parallel. |
See Also
About Supported Microprocessors
Send Feedback on this topic to the authors