Shift Operations
Microsoft Specific
The intrinsics listed in the following table are followed by their descriptions.
SSE2 intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE2 intrinsics that use the __m64 data type are not supported on x64 processors.
The emmintrin.h header file contains the declarations for the SSE2 instructions intrinsics.
Shift Operation Intrinsics
Intrinsic shift |
Direction shift |
Type |
Corresponding instruction |
|---|---|---|---|
Left |
Logical |
PSLLDQ |
|
Left |
Logical |
PSLLW |
|
Left |
Logical |
PSLLW |
|
Left |
Logical |
PSLLD |
|
Left |
Logical |
PSLLD |
|
Left |
Logical |
PSLLQ |
|
Left |
Logical |
PSLLQ |
|
Right |
Arithmetic |
PSRAW |
|
Right |
Arithmetic |
PSRAW |
|
Right |
Arithmetic |
PSRAD |
|
Right |
Arithmetic |
PSRAD |
|
Right |
Logical |
PSRLDQ |
|
Right |
Logical |
PSRLW |
|
Right |
Logical |
PSRLW |
|
Right |
Logical |
PSRLD |
|
Right |
Logical |
PSRLD |
|
Right |
Logical |
PSRLQ |
|
Right |
Logical |
PSRLQ |
For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.