__m64_mix1l, __m64_mix1r, __m64_mix2l, __m64_mix2r, __m64_mix4l, __m64_mix4r
Microsoft Specific
Emit various forms of the IPF Mix (mix) instruction, which generates a result based on a certain mix of the bytes from the two operands.
__m64 __m64_mix1l(
__m64 a,
__m64 b
);
__m64 __m64_mix1r(
__m64 a,
__m64 b
);
__m64 __m64_mix2l(
__m64 a,
__m64 b
);
__m64 __m64_mix2r(
__m64 a,
__m64 b
);
__m64 __m64_mix4l(
__m64 a,
__m64 b
);
__m64 __m64_mix4r(
__m64 a,
__m64 b
);
Parameters
- [in] a
The first source value.
- [in] b
The second source value.
Requirements
| Intrinsic | Architecture |
|---|---|
__m64_mix1l |
IPF |
__m64_mix1r |
IPF |
__m64_mix2l |
IPF |
__m64_mix2r |
IPF |
__m64_mix4l |
IPF |
__m64_mix4r |
IPF |
Header file <intrin.h>
Remarks
The various forms of the instruction specify the way in which the bytes are arranged to form the result. The instructions vary according to the number of bytes that are copied in blocks and whether the left or right block of each pair of blocks is chosen for the result.
The source parameters are considered to be divided into blocks of size 1, 2, or 4 bytes as indicated by the name of the intrinsic. Adjacent source blocks are grouped into pairs with a left (higher order) and right (lower order) member of each pair.
For the left-handed (l) versions of these intrinsics, the result is built up from left to right in the following way: each successive pair of blocks in the result is formed by choosing the left block of a pair from a followed by the left block of the corresponding pair from b, always choosing pairs from left to right.
For the right-handed (r) versions of these intrinsics, the result is built up from left to right in the following way: each successive pair of blocks in the result is formed by choosing the right block of a pair from a followed by the right block of the corresponding pair from b, always choosing pairs from left to right.
Example
// mix.cpp
// processor: IPF
#include <stdio.h>
#include <intrin.h>
#pragma intrinsic(__m64_mix1l, __m64_mix1r, __m64_mix2l)
#pragma intrinsic(__m64_mix2r, __m64_mix4l, __m64_mix4r)
void f(__m64 a, __m64 b)
{
__m64 t;
t = __m64_mix1l(a, b);
printf_s("mix1l(0x%I64x, 0x%I64x) returns 0x%I64x\n",
a.m64_u64, b.m64_u64, t.m64_u64);
t = __m64_mix1r(a, b);
printf_s("mix1r(0x%I64x, 0x%I64x) returns 0x%I64x\n",
a.m64_u64, b.m64_u64, t.m64_u64);
t = __m64_mix2l(a, b);
printf_s("mix2l(0x%I64x, 0x%I64x) returns 0x%I64x\n",
a.m64_u64, b.m64_u64, t.m64_u64);
t = __m64_mix2r(a, b);
printf_s("mix2r(0x%I64x, 0x%I64x) returns 0x%I64x\n",
a.m64_u64, b.m64_u64, t.m64_u64);
t = __m64_mix4l(a, b);
printf_s("mix4l(0x%I64x, 0x%I64x) returns 0x%I64x\n",
a.m64_u64, b.m64_u64, t.m64_u64);
t = __m64_mix4r(a, b);
printf_s("mix4r(0x%I64x, 0x%I64x) returns 0x%I64x\n",
a.m64_u64, b.m64_u64, t.m64_u64);
}
int main()
{
__m64 m, n;
m.m64_u64 = -1;
n.m64_u64 = 0;
f(m, n);
m.m64_u64 = 0x7766554433221100;
n.m64_u64 = 0xFFEEDDCCBBAA9988;
f(m, n);
}
Output
mix1l(0xffffffffffffffff, 0x0) returns 0xff00ff00ff00ff00 mix1r(0xffffffffffffffff, 0x0) returns 0xff00ff00ff00ff00 mix2l(0xffffffffffffffff, 0x0) returns 0xffff0000ffff0000 mix2r(0xffffffffffffffff, 0x0) returns 0xffff0000ffff0000 mix4l(0xffffffffffffffff, 0x0) returns 0xffffffff00000000 mix4r(0xffffffffffffffff, 0x0) returns 0xffffffff00000000 mix1l(0x7766554433221100, 0xffeeddccbbaa9988) returns 0x77ff55dd33bb1199 mix1r(0x7766554433221100, 0xffeeddccbbaa9988) returns 0x66ee44cc22aa0088 mix2l(0x7766554433221100, 0xffeeddccbbaa9988) returns 0x7766ffee3322bbaa mix2r(0x7766554433221100, 0xffeeddccbbaa9988) returns 0x5544ddcc11009988 mix4l(0x7766554433221100, 0xffeeddccbbaa9988) returns 0x77665544ffeeddcc mix4r(0x7766554433221100, 0xffeeddccbbaa9988) returns 0x33221100bbaa9988