IsProcessorFeaturePresent (Compact 2013)
3/28/2014
This function retrieves information about supported features in a system.
Syntax
BOOL IsProcessorFeaturePresent(
DWORD dwProcessorFeature
);
Parameters
dwProcessorFeature
[in] Flag for the feature that you want to verify support for.The following table shows the flags for ARM processor features.
Flag
Description
PF_ARM_64BIT_LOADSTORE_ATOMIC
The 64-bit load/store atomic instructions are available.
PF_ARM_CACHE_CAN_BE_LOCKED_DOWN
The cache can be locked down.
PF_ARM_DIVIDE_INSTRUCTION_AVAILABLE
The divide instructions are available.
PF_ARM_DSP
This flag is deprecated. The E DSP instructions are available.
PF_ARM_DTCM
Tightly coupled data memory is available.
PF_ARM_EXTERNAL_CACHE_AVAILABLE
The external cache is available.
PF_ARM_INTEL_PMU
This flag is deprecated. The Performance Monitor Unit (PMU) is available.
PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE
The floating-point multiply-accumulate instruction is available.
PF_ARM_INTEL_WMMX
This flag is deprecated. Wireless MMX (WMMX) is supported.
PF_ARM_INTEL_XSCALE
The Intel XScale processor. This can be used to determine whether the processor supports operations where
src==dest.PF_ARM_ITCM
Tightly coupled data memory.
PF_ARM_JAZELLE
The ARM Jazelle technology.
PF_ARM_L2CACHE
This flag is deprecated. The level 2 cache controller. For the correct flags to use, see the other L2 cache flags.
PF_ARM_L2CACHE_COPROC
The level 2 cache controller implemented as a coprocessor.
PF_ARM_L2CACHE_MEMORY_MAPPED
The level 2 cache controller implemented as a memory-mapped peripheral.
PF_ARM_MBX
The ARM MBX technology.
PF_ARM_MOVE_CP
The ARM MOVE coprocessor.
PF_ARM_MPU
Support for memory protection unit (MPU) is available.
PF_ARM_NEON
The NEON instruction set.
PF_ARM_NEON_HALF_PRECISION
The NEON half-precision floating point values.
This flag always returns TRUE as NEON is required for Windows Embedded Compact 2013.
PF_ARM_NEON_INSTRUCTIONS_AVAILABLE
Support for Advanced SIMD registers, single-precision floating-point SIMD, integer SIMD, and advanced SIMD load/store is available.
PF_ARM_NEON_LOAD_STORE
The NEON SIMD loads and stores.
This flag always returns TRUE as NEON is required for Windows Embedded Compact 2013.
PF_ARM_NEON_SINGLE_PRECISION
The NEON single-precision floating-point values.
This flag always returns TRUE as NEON is required for Windows Embedded Compact 2013.
PF_ARM_PHYSICALLY_TAGGED_CACHE
The cache is, or can be, physically tagged.
PF_ARM_T2EE
The T2EE instruction set.
PF_ARM_THUMB
The thumb instruction set.
PF_ARM_THUMB2
The thumb2 instruction set.
PF_ARM_UNALIGNED_ACCESS
Can support unaligned access. You must call a KLIB_IOCTL to turn this on.
This flag always returns TRUE.
PF_ARM_UNIFIED_CACHE
The unified cache.
PF_ARM_V6
The ARM architecture v6. This flag always returns TRUE.
PF_ARM_V7
The ARM architecture v7. This flag always returns TRUE.
PF_ARM_VFP_32_REGISTERS_AVAILABLE
The VFP/Neon: 32 x 64bit register bank is present. This flag has the same meaning as PF_ARM_VFP_EXTENDED_REGISTERS.
PF_ARM_VFP_DENORMALS
The VFP denormalized number arithmetic. This flag always returns TRUE.
PF_ARM_VFP_DOUBLE_PRECISION
The double-precision vectored floating-point unit. This flag always returns TRUE.
PF_ARM_VFP_SINGLE_PRECISION
The single-precision vectored floating-point unit. This flag always returns TRUE.
PF_ARM_VFP_SUPPORT
The OS support for VFP, such as VFP context switch and handling bounced VFP instructions. This does not indicate the presence of VFP hardware. Use PF_ARM_VFP_HARDWARE to query for VFP hardware. This flag always returns TRUE.
PF_ARM_VFP_HARDWARE
The VFP hardware implementation (any version). This flag always returns TRUE.
PF_ARM_VFP_V1
The VFP1 hardware. This flag always returns TRUE.
PF_ARM_VFP_V2
The VFP2 hardware. This flag always returns TRUE.
PF_ARM_VFP_V3
The VFP3 hardware. This flag always returns TRUE.
PF_ARM_VFP_SINGLE_PRECISION
The VFP hardware support for single-precision floating-point values. This flag always returns TRUE.
PF_ARM_VFP_DOUBLE_PRECISION
The VFP hardware support for double-precision floating-point values. This flag always returns TRUE.
PF_ARM_VFP_ALL_ROUNDING_MODES
The VFP support for all IEEE rounding modes. This flag always returns TRUE.
PF_ARM_VFP_SHORT_VECTORS
The VFP support for short vector operations. This flag always returns TRUE.
PF_ARM_VFP_SQUARE_ROOT
The square root implemented in VFP hardware. This flag always returns TRUE.
PF_ARM_VFP_DIVIDE
The divide operations implemented in VFP hardware. This flag always returns TRUE.
PF_ARM_VFP_FP_EXCEPTIONS
The VFP support for trapped exceptions.
PF_ARM_VFP_EXTENDED_REGISTERS
The VFP/Neon: 32 x 64-bit register bank. This flag always returns TRUE.
PF_ARM_VFP_HALF_PRECISION
The VFP support for half-precision floating-point values. This flag always returns TRUE.
PF_ARM_VFP10
The VFP10 floating-point unit. This flag is obsolete. For the correct flags to use, see the other VFP flags. This flag always returns TRUE.
PF_ARM_WRITE_BUFFER
The writeback buffer.
PF_ARM_WRITE_BACK_CACHE
The writeback cache.
The following table shows the flags for x86 processor features.
Flag
Description
PF_3DNOW_INSTRUCTIONS_AVAILABLE
The 3D-Now instruction set is available.
PF_COMPARE_EXCHANGE_DOUBLE
The atomic compare and exchange operation (cmpxchg) is available.
PF_FASTFAIL_AVAILABLE
_fastfail() is available.
PF_FLOATING_POINT_EMULATED
Floating-point operations are emulated.
PF_FLOATING_POINT_PRECISION_ERRATA
On a Pentium CPU, a floating-point precision error can occur in rare circumstances
PF_MMX_INSTRUCTIONS_AVAILABLE
MMX instruction set support is available.
PF_PAE_ENABLED
The processor is PAE-enabled. For more information, see Physical Address Extension.
PF_RDTSC_INSTRUCTION_AVAILABLE
RDTSC (read time-stamp counter) instruction is available.
PF_RDWRFSGSBASE_AVAILABLE
RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE instructions are available.
PF_SECOND_LEVEL_ADDRESS_TRANSLATION
Second-level address translation (SLAT) support is available.
PF_VIRT_FIRMWARE_ENABLED
Firmware virtualization is enabled in the BIOS.
PF_XSAVE_ENABLED
XSAVE and Processor Extended States are enabled.
PF_XMMI_INSTRUCTIONS_AVAILABLE
The streaming SIMD Extensions (SSE) instruction set is available.
PF_XMMI64_INSTRUCTIONS_AVAILABLE
SSE2 instruction set support is available.
PF_X86_VIRTUALIZED
Indicates whether the system running in a virtual machine.
PF_X86_HYPERVISOR
Indicates whether Hypervisor is present.
Note
All other PF_XXX flags return FALSE.
Return Value
Nonzero indicates that the processor feature is supported. FALSE indicates that the processor feature is not supported.
Remarks
The PF_XXX flags in dwProcessorFeature are filtered based on the CPU type. Only the PF_XXX flags corresponding to the CPU being compiled are present.
Requirements
Header |
windows.h |
Library |
OEMMain.lib or OEMMain_StaticKITL.lib |