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NVME_AUTO_POWER_STATE_TRANSITION_ENTRY structure (nvme.h)

  • Article

Contains a 64 bit entry specifying information about idle time and power state transition for each of the allowable 32 power states. The entries begin with power state 0 and then increase sequentially. For example, power state 0 is described in bytes 7:0, power state 1 is described in bytes 15:8, and so on. The data structure is 256 bytes in size and should be physically contiguous.

For power states that are not supported, the unused NVME_AUTO_POWER_STATE_TRANSITION_ENTRY data structure entries will be cleared to all zeroes.

Syntax

typedef struct {
  ULONG Reserved0 : 3;
  ULONG IdleTransitionPowerState : 5;
  ULONG IdleTimePriorToTransition : 24;
  ULONG Reserved1;
} NVME_AUTO_POWER_STATE_TRANSITION_ENTRY, *PNVME_AUTO_POWER_STATE_TRANSITION_ENTRY;

Members

Reserved0

Bits 0-2 are reserved.

IdleTransitionPowerState

Idle Transition Power State (ITPS) specified in Bits 3-7 is the non-operational power state for the controller to autonomously transition to after there is a continuous period of idle time in the current power state that exceeds the time specified in the IdleTimePriorToTransition field.

IdleTimePriorToTransition

Idle Time Prior to Transition (ITPT) specified in Bits 8-31 is the amount of idle time that occurs in this power state prior to transitioning to the Idle Transition Power State. The time is specified in milliseconds. A value of 0h disables the autonomous power state transition feature for this power state.

Reserved1

Bits 32-63 are reserved.

Remarks

This structure is used in the Autonomous Power State Transition Enable (APSTE) parameter of the NVME_CDW11_FEATURE_AUTO_POWER_STATE_TRANSITION structure.

Requirements

Requirement Value
Minimum supported client Windows 10
Header nvme.h