Masking Interrupts (Windows Embedded CE 6.0)

1/6/2010

Interrupt masking allows you to disable the detection of an interrupt-line assertion, which causes the OS to ignore interrupt signal. The signal can be ignored at the microprocessor level or at other levels in the hardware architecture.

In some cases, each interrupt source in the system can be masked individually. In other cases, masking an interrupt in a microprocessor register can mask a group of interrupts. An example of this is shared interrupts.

When an interrupt occurs, the microprocessor must globally disable interrupts at the microprocessor level to avoid being interrupted while gathering and saving interrupt state information. Because disabling interrupts globally blocks all other interrupts, mask global interrupts for as short a time as possible in your OAL ISR code. When you determine what has specifically interrupted, you can mask just that interrupt.

See Also

Other Resources

Interrupt Handling
Defining an Interrupt Identifier
Implementing an ISR
Loader
PCI Bus Driver
Real-Time Priority System